The Evolution of Chipset I/O Interface and PCI Express
Most PC enthusiasts can't remember a time when they didn't use PCI-compatible hardware when upgrading their video or sound to make their PC the worst gaming machine on the block. In may come as a surprise to some that the PCI interface has been with us for over 10 years now-in terms of our own time frames this could be compared to say, the discovery of electricity or the invention of the wheel. All joking aside, the original PCI interface was first used way back in 1991 when the internet was merely a rumor, while version 2.0 that we use now has been the de facto standard in PC hardware since 1993, when the Internet was being referred to as the "information superhighway" . While this term seems quaint at best now, it illustrates how far the information revolution has come without a comparable change in technology. While there were other competitors to PCI, ironically one of the main reasons PCI became so popular with hardware manufacturers was because its bus transfer speed could be kept to a manageable 33 MHZ and separate from the speed of the processor. Other I/O standards, such as the VL bus, were run synchronously with the processor, so as processor speeds increased, so did the speed of the bus. This meant that hardware such as VGAs and soundcards had to be engineered to be able to keep up with the CPU. With the ongoing dramatic increase in processor speeds, this would have been an expensive proposition, as processor speeds have increased by 10 times in just a few years. Designing all peripherals to be 10 times as fast would have been complicated, expensive or perhaps even impossible. The chipset's evolution into a northbridge (memory hub) and southbridge (I/0 hub) has occurred because of the need to keep the stable I/O hub separate from the ever-increasing speed of the memory hub. While speeds, performance, and price of processor and memory have increased, the overall price of the PC has been kept down because of the stability inherent to the PCI bus architecture.

The Evolution of I/O Interface
With these advantages, the PCI bus has served the industry and consumers well, but now has come a point where the PCI bus is beginning to show its age. With the increase in high bandwidth applications such as gigabit LAN and RAID, and with more and more users storing their entire photo collection, video and music library on their PCs, the standard 33 MHz PCI bus is simply not big enough. As well, users now often process many different types of data concurrently, such as real-time data (e.g. video conferencing) alongside streaming data. The PCI bus has no way to differentiate these types of data, and real time data flow usually is degraded in quality.

Comparison of 3 Different I/O Interface with GbE

MuTIOL 1G ® provides dedicated link for all peripherals and makes no bottleneck

PCI Express: The New Generation I/O Spec

The key to this flexibility is the scalable nature of PCI Express, as well as its serial nature. Whereas PCI sent data in parallel, PCI Express is constructed from 1 all the way up to 32 “lanes”. Each lane has contained a set of differential signal pairs, one pair for transmission, and another pair for reception. This “stackable” structure makes PCI Express extremely flexible, with PCI Express x1 offering 250 MB/s transfer rate and x32 offering up to 8 GB/s! For example, manufacturers can use x1 PCI express for applications such as gigabit LAN or SATA; although x1 has the least bandwidth of all PCI Express standards, it still has almost double the rate of the old PCI bus, and is more than adequate for most hardware implementations at the desktop level. Where PCI Express really shows its strengths is when multiple lines are stacked together, giving manufacturers and developers enough bandwidth to create powerful hardware and software for desktop PCs, notebooks, severs and workstations. Indeed, it can be said that finally, after all these years, PC I/O technology has caught up with the huge advances made in processor and memory technology.

Perhaps the most exciting advance will be the replacement of the AGP slot with a PCI Express x16 slot. PCI Express x16 offers a 4 GB/s transfer rate per directional lane (8 GB/s with both lanes), almost double the current AGP standard. Indeed, game developers, graphics card manufacturers and gamers themselves are eagerly anticipating this move to PCI Express x16 as the next evolutionary step for PC gaming. VGA cards using this slot are set to hit the market now, but don’t expect the games themselves to fully utilize the new technology for at least another year.

The SiS Solution to PCI Express
SiS sees the development of PCI Express technology on our chipsets as essential to giving our customers the best solution for desktop and mobile platforms. The SiS656/756 northbridge and SiS965/965L southbridge are designed to be the link between the current PCI era and the upcoming PCI Express era. The 965 southbridge , in addition to 4 SATA and gigabit LAN, offers support for PCI Express x1 making it the ideal I/O hub for next generation platforms. The SiS656 and SiS649 northbridge, for the Intel Pentium ® 4 platform, and the SiS756, for the Athlon™ 64 FX platform, both offer support for the PCI Express X16 next generation graphic interface set to replace the AGP slot. Graphic cards featuring this specification are ready and will be shippin g by Q2 2004, so SiS customers will be well positioned to take advantage of this important industry shift. By using a combination of SiS656/649/756 and SiS965/965L for desktop or notebook solutions, vendors can be assured that they have the best solution for end-users that gives them the best of both worlds in terms of technological relevancy; users don't have to worry about upgrading their entire system when they can enjoy the newest components designed for PCI Express.

SiS656	SiS756	SiS649

SiS PCI Express Chipsets