Taipei, Taiwan, December 21, 2000 - SiS, a leading core logic and graphics chip supplier, today held a groundbreaking ceremony for the company's first 300-mm wafer fab and a product R/D center in the Tainan Science-based Industrial Park. The ceremony was hosted by Dr. Eugene C.Y. Duh, Chairman of SiS, with guests including President of Academia Sinica, Dr. Lee Yuan-tse.

SiS secured the 12-hectare site in Tainan Science-based Industrial Park with the plan to construct two 300mm wafer fabs and a R/D building with space for 1,500 engineers. The construction of the first fab will be completed in 2002. The fab will start with the company's existing 0.15u process or below, with forecasted capacity of 20,000 wafers per month which will support substantial future revenue growth. Investment for the first 300mm wafer fab and the R/D center is estimated at approximately US$1.6 billion. SiS plans to recruit publicly and globally for all the employees in Tainan. The company intends to develop the technologies primarily in-house, but also welcomes opportunities to work with other world-class leaders. The Tainan project hopes to contribute materially to the development of high-tech infrastructure in southern Taiwan and to the overall growth of Taiwan's semiconductor industry.

"SiS is a world-class product company and must continue to strengthen our overall R/D and manufacturing capabilities to fuel future growth. The Tainan program signifies our commitment to stay competitive for the long term and will be watershed for years to come." said Dr. S. Samuel Liu, President and CEO of SiS.

In addition to the existing product portfolio in core logic, graphics and communication, the 300mm fab will expand support for other product areas in the future, including system-on-chip and information appliance. The combination of highly competent product R/D and manufacturing capabilities will allow SiS to effectively manage its own destiny and realize its corporate vision to be a highly respected, pre-eminent technology leader in the world.