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SiS655
Dual-Channel DDR333 Plus AGP 8X Chipset for Intel® Pentium® 4



Overview
Key Features
Features & Benefits

The SiS655 integrates a high performance host interface for Intel® Pentium® 4 processor, a high performance Dual-Channel DDR333 Memory controller, a AGP interface and SiS MuTIOL® 1G Technology connecting w/ SiS963 MuTIOL® 1G Media I/O. The SiS655 Host Interface features the AGTL & AGTL+ compliant bus driver technology with integrated on-die termination to support Intel® Pentium® 4 series processors with FSB 400MHz/533MHz. It provides a 12-level In-Order-Queue to support maximum outstanding transactions on host bus up to 12. The host interface plays the role of processor transactions' dispatcher. It dispatches transactions to Memory, I/O interface and AGP bus. Transactions to different destinations can be dispatched concurrently in order to maximum pipeline efficiency. In addition to dispatching processor's transactions to corresponding destinations, host interface also forward DMA transactions from AGP masters and I/O masters to host bus for snooping, including master interrupt delivery.

The SiS655 Dual-Channel Memory Controller, being the first Pentium® 4 chipset in the worldwide that delivers 5.4 GB/s bandwidth way adequate and satisfactory to the 133MHz Pentium 4 FSB bandwidth demand of 4.2GB/s, absolutely brings out the best performance of each other, and still has a lot to spare for the multi-I/O masters, and AGP masters. The SiS655 Dual-Channel Memory Controller offers a table-free memory configuration with flexible granularity, being supporting the three operating modes, namely the legacy 64-bit mode, the single 128-bit mode, and the concurrent dual 64-bit mode.

The AGP interface can support external AGP slot with AGP 8X/4X capability and Fast Write Transactions. A high bandwidth and mature SiS MuTIOL® 1G technology is incorporated to connect SiS655 and SiS963 MuTIOL® 1G Media I/O together. SiS MuTIOL® 1G technology is developed into three layers, the Multi-threaded I/O Link Layer delivering 1.2GB bandwidth to connect embedded DMA Master devices and external PCI masters to interface to Multi-threaded I/O Link layer, the Multi-threaded I/O Packet Layer in SiS963 to transfer data w/ 1 GB/s bandwidth from/to Multi-threaded I/O Link layer to/from SiS655, and the Multi-threaded I/O Packet Layer in SiS655 to transfer data w/ 1 GB/s from/to Multi-threaded I/O Link layer to/from SiS963.



 

 

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